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 User's Manual
IE-784225-NS-EM1
Emulation Board
Target devices PD784216A Subseries PD784218A Subseries PD784225 Subseries
PD784216AY Subseries PD784218AY Subseries PD784225Y Subseries
Document No. U13742EJ2V0UM00 (2nd edition) Date Published March 2002 N CP(K)
(c) 1999 Printed in Japan
[MEMO]
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User's Manual U13742EJ2V0UM
Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT is a trademark of International Business Machines Corporation.
* The information in this document is current as of June, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4
User's Manual U13742EJ2V0UM
3
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify:
* * * * *
Device availability Ordering information Product release schedule Availability of related technical literature Development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, AC supply voltages, and so forth) Network requirements
*
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country.
NEC Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
NEC Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-3067-58-00 Fax: 01-3067-58-99
NEC Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
NEC Electronics (France) S.A.
Representacion en Espana Madrid, Spain Tel: 091-504-27-87 Fax: 091-504-28-60
NEC Electronics Hong Kong Ltd.
Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
NEC Electronics (Europe) GmbH
Duesseldorf, Germany Tel: 0211-65 03 01 Fax: 0211-65 03 327
* Branch The Netherlands
NEC Electronics Italiana S.R.L.
Milano, Italy Tel: 02-66 75 41 Fax: 02-66 75 42 99
NEC Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
Eindhoven, The Netherlands Tel: 040-244 58 45 Fax: 040-244 45 80
* Branch Sweden
NEC Electronics Taiwan Ltd. NEC Electronics (UK) Ltd.
Milton Keynes, UK Tel: 01908-691-133 Fax: 01908-670-290 Taeby, Sweden Tel: 08-63 80 820 Fax: 08-63 80 388 Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
NEC do Brasil S.A.
Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829
J01.12
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User's Manual U13742EJ2V0UM
Major Revisions in This Edition
Page p.12 p.15 p.20 p.22 p.27 p.46 p.48 Description Modification of figure and description in Figure 1-1 System Configuration Modification of description in Table 1-1 Basic Specifications Addition of 3.3 Selection of Emulator Main Unit Modification of description in 3.4.2 Main system clock settings Modification of description in 3.4.3 Subsystem clock settings Modification of title and description in APPENDIX B Addition of APPENDIX C REVISION HISTORY The mark shows major revised points.
User's Manual U13742EJ2V0UM
5
INTRODUCTION
Product Overview
The IE-784225-NS-EM1 is designed to be used with the IE-78K4-NS to debug the following target devices that belong to the 78K/IV Series of 16-bit single-chip microcontrollers. * PD784216A Subseries: * PD784218A Subseries: * PD784225 Subseries: * PD784225Y Subseries:
PD784214A, 784215A, 784216A, 78F4216A PD784217A, 784218A, 78F4218A PD784224, 784225, 78F4225 PD784224Y, 784225Y, 78F4225Y
* PD784216AY Subseries: PD784214AY, 784215AY, 784216AY, 78F4216AY * PD784218AY Subseries: PD784217AY, 784218AY, 78F4218AY
Target Readers
This manual is intended for engineers who will use the IE-784225-NS-EM1 with the IE78K4-NS to perform system debugging. Engineers who use this manual are expected to be thoroughly familiar with the target device's functions and use methods and to be knowledgeable about debugging.
Organization
When using the IE-784225-NS-EM1, refer to not only this manual (supplied with the IE784225-NS-EM1) but also the manual that is supplied with the IE-78K4-NS. IE-78K4-NS User's Manual * Basic specifications * System configuration * External interface functions IE-784225-NS-EM1 User's Manual * General * Part names * Installation * Differences between target devices and target interface circuits
Purpose
This manual's purpose is to explain various debugging functions that can be performed when using the IE-784225-NS-EM1.
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User's Manual U13742EJ2V0UM
Terminology
Term Emulation device
The meanings of certain terms used in this manual are listed below.
Meaning This is a general term that refers to the device in the emulator that is used to emulate the target device. It includes the emulation CPU. This is the CPU block in the emulator that is used to execute user-generated programs. This is the device (a real chip) that is the target for emulation. This includes the target program and the hardware provided by the user. narrowly, it includes only the hardware. This refers to the combination of the IE-78K4-NS and the IE-784225-NS-EM1. When defined
Emulation CPU Target device Target system
IE system
Conventions
Data significance: Higher digits on the left and lower digits on the right Note: Caution: Remark: Footnote for item marked with Note in the text Information requiring particular attention Supplementary information
Related Documents
The related documents (user's manuals) indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such.
Document Name Document No. U13356E This manual
TM
IE-78K4-NS IE-784225-NS-EM1 ID78K Series Integrated Debugger Ver. 2.30 or Later Windows Based Operation Hardware Hardware
U15185E U13570E U12697E
PD784216A, 784218A, 784216AY, 784218AY Subseries PD784225, 784225Y Subseries
Caution
The related documents listed above are subject to change without notice. Be sure to use the latest version of each document for designing.
User's Manual U13742EJ2V0UM
7
CONTENTS
CHAPTER 1 GENERAL..............................................................................................................................11
1.1 1.2 1.3 System Configuration................................................................................................................................12 Hardware Configuration ............................................................................................................................14 Basic Specifications ..................................................................................................................................15
CHAPTER 2 PART NAMES........................................................................................................................16
2.1 Parts of Main Unit.......................................................................................................................................17
CHAPTER 3 INSTALLATION .....................................................................................................................18
3.1 3.2 3.3 3.4 Connection .................................................................................................................................................19 Target Device Setting ................................................................................................................................20 Selection of Emulator Main Unit ...............................................................................................................20 Clock Settings ............................................................................................................................................20 3.4.1 3.4.2 3.4.3 3.4.4 3.5 3.5.1 3.5.2 3.5.3 3.6 3.7 Overview of clock settings .............................................................................................................20 Main system clock settings ............................................................................................................22 Subsystem clock settings...............................................................................................................27 Slew-rate clock emulation ..............................................................................................................31 Wait (WAIT) mask function ............................................................................................................32 Wait display function setting ..........................................................................................................32 NMI interrupt mask setting .............................................................................................................32
Pin Mask Function Settings ......................................................................................................................32
Low-Voltage Emulation Setting ................................................................................................................33 External Trigger..........................................................................................................................................34
CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS ..35 APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE..............................................................40 APPENDIX B PROGRAM WAIT CONTROL REGISTER SETTINGS IN IN-CIRCUIT EMULATOR .........46 APPENDIX C REVISION HISTORY............................................................................................................48
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User's Manual U13742EJ2V0UM
LIST OF FIGURES
Figure No. 1-1 1-2 2-1 3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 4-1 4-2 4-3 4-4
Title
Page
System Configuration...................................................................................................................................12 Basic Hardware Configuration .....................................................................................................................14 IE-784225-NS-EM1 Part Names ..................................................................................................................17 Connection of Emulation Probe ...................................................................................................................19 External Circuits Used as System Clock Oscillator......................................................................................20 When Using Clock That Is Already Mounted on Emulation Board...............................................................21 When Using User-Mounted Clock................................................................................................................21 When Using an External Clock ....................................................................................................................22 Connections on Parts Board (When Using Main System Clock or User-Mounted Clock)............................23 Crystal Oscillator (When Using Main System Clock or User-Mounted Clock) .............................................25 Pin Alignment of Crystal Oscillator and Socket............................................................................................25 Connections on Parts Board (When Using Subsystem Clock or User-Mounted Clock)...............................28 Crystal Oscillator (When Using Subsystem Clock or User-Mounted Clock) ................................................30 External Trigger Input Position.....................................................................................................................34 Equivalent Circuit 1 of Emulation Circuit ......................................................................................................36 Equivalent Circuit 2 of Emulation Circuit ......................................................................................................37 Equivalent Circuit 3 of Emulation Circuit ......................................................................................................38 Equivalent Circuit 4 of Emulation Circuit ......................................................................................................39
User's Manual U13742EJ2V0UM
9
LIST OF TABLES
Table No. 1-1 3-1 3-2 3-3 3-4 3-5 3-6 A-1 A-2 A-3
Title
Page
Basic Specifications .................................................................................................................................... 15 Main System Clock Settings........................................................................................................................ 22 Subsystem Clock Settings........................................................................................................................... 27 DIP Switch Setting When Using Slew-Rate Clock Mode............................................................................. 31 DIP Switch Setting for Wait (WAIT) Mask Function..................................................................................... 32 DIP Switch Setting for Wait Display Function.............................................................................................. 32 DIP Switch Setting for NMI Interrupt Mask .................................................................................................. 32 NP-80GC/GK Pin Assignments ................................................................................................................... 40 NP-100GC Pin Assignments ....................................................................................................................... 42 NP-100GF Pin Assignments ....................................................................................................................... 44
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User's Manual U13742EJ2V0UM
CHAPTER 1 GENERAL
The IE-784225-NS-EM1 is a development tool for efficient debugging of hardware or software when using one of the following target devices that belong to the 78K/IV Series of 16-bit single-chip microcontrollers. This chapter describes the IE-784225-NS-EM1's system configuration and basic specifications.
*
Target devices * PD784216A Subseries * PD784216AY Subseries * PD784218A Subseries * PD784218AY Subseries * PD784225 Subseries * PD784225Y Subseries
User's Manual U13742EJ2V0UM
11
CHAPTER 1 GENERAL
1.1
System Configuration
Figure 1-1 illustrates the IE-784225-NS-EM1's system configuration. Figure 1-1. System Configuration
Debugger ID78K4-NS (sold separately) Device fileNote 1 (sold separately)
Control software
Host machine PC-9800 Series or IBM PC/ATTM or compatibles
Interface board IE-70000-98-IF-C (sold separately)
Interface board IE-70000-PC-IF-C (sold separately)
Interface board IE-70000-PCI-IF(-A) (sold separately) Interface card
or
Interface cable (NS IF Cable) IE-78K4-NS (sold separately)
Interface cable
In-circuit emulator
NS CARD Cable
MC CARD Cable
FG Cable
IE-70000-CD-IF-A (sold separately) IE-784225-NS-EM1 (This product)
AC adapter IE-70000-MC-PS-B (sold separately)
Emulation probeNote 2 (sold separately) Conversion socket/conversion adapterNote 3 (sold separately)
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User's Manual U13742EJ2V0UM
CHAPTER 1 GENERAL
Notes 1.
The device file is as follows, in accordance with the subseries.
SxxxxDF784218: PD784216A, 784216AY, 784218A, 784218AY Subseries SxxxxDF784225: PD784225, 784225Y Subseries
The device file can be downloaded from the website of NEC Electron Devices (http://www.ic.nec.co.jp/micro/). 2. The emulation probe is as follows, in accordance with the package. NP-80GC: NP-80GK: 80-pin plastic QFP (GC-8BT type) 80-pin plastic TQFP (GK-BE9 type)
NP-100GC: 100-pin plastic LQFP (GC-7EA type) NP-100GF: 100-pin plastic QFP (GF-3BA type) The NP-80GC, NP-80GK, NP-100GC, and NP-100GF are products of Naito Densei Machida Mfg. Co., Ltd. For further information, contact Naito Densei Machida Mfg. Co., Ltd. (TEL: +81-45-475-4191) 3. The conversion socket/conversion adapter are as follows, in accordance with the package. EV-9200GK-80: TGC-080SDW: TGC-100SDW: 80-pin plastic TQFP (GK-BE9 type) 80-pin plastic LQFP (GC-8BT type) 100-pin plastic LQFP (GC-7EA type) EV-9200GF-100: 100-pin plastic QFP (GF-3BA type)
The TGC-080SDW and TGC-100SDW are products of TOKYO ELETECH CORPORATION. For further information, contact Daimaru Kogyo Co., Ltd. Tokyo Electronics Department (TEL: +81-3-3820-7112) Osaka Electronics Department (TEL: +81-6-6244-6672)
User's Manual U13742EJ2V0UM
13
CHAPTER 1 GENERAL
1.2
Hardware Configuration
Figure 1-2 shows the IE-784225-NS-EM1's position in the basic hardware configuration. Figure 1-2. Basic Hardware Configuration
Dedicated bus interface IE system IE-78K4-NS (sold separately) Interface board (sold separately) 78K4 main board (G-78K4 MAIN Board) IE-784225-NS-EM1 Emulation board (This product)
Host machine
Interface card (sold separately)
78K4 emulation board (G-78K4 EM Board) Emulation probe (sold separately)
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User's Manual U13742EJ2V0UM
CHAPTER 1 GENERAL
1.3
Basic Specifications
The IE-784225-NS-EM1's basic specifications are listed in Table 1-1. Table 1-1. Basic Specifications
Parameter Target device System clock Main clock supply Description
PD784216A, 784218A, 784216AY, 784218AY, 784225, 784225Y Subseries
12.5 MHz External: Input via an emulation probe from the target system Internal: Mounted on emulation board (25 MHz), or mounted on the board by the user
Subclock supply
External: Input via an emulation probe from the target system Internal: Mounted on emulation board (32.768 kHz), or mounted on the board by the user
Low-voltage support
3 V or higher (same as target device)
User's Manual U13742EJ2V0UM
15
CHAPTER 2 PART NAMES
This chapter introduces the parts of the IE-784225-NS-EM1 main unit. The packing box contains the emulation board (IE-784225-NS-EM1). If there are any missing or damaged items, please contact an NEC sales representative. Fill out and return the guarantee document that comes with the main unit.
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User's Manual U13742EJ2V0UM
CHAPTER 2 PART NAMES
2.1
Parts of Main Unit
Figure 2-1. IE-784225-NS-EM1 Part Names
SW1 SW2
4 X1 UMCLK 6 JP1
14
1
TP1
GND Low Volt EXTOUT EXTIN
36
3
X2 USCLK
CN2
CN1
TP4 TP3
Probe connector CN1 100GC/GF CN2 80GC/GK USERVDD LED1 SW3 DIP switch OFF IE-784225-NS-EM1 WAIT LED2
User's Manual U13742EJ2V0UM
17
CHAPTER 3 INSTALLATION
This chapter describes methods for connecting the IE-784225-NS-EM1 to the IE-78K4-NS, emulation probe, etc. Mode setting methods are also described. Caution Connecting or removing components to or from the target system, or making switch or other setting changes must be carried out after the power supply to both the IE system and the target system has been switched OFF.
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CHAPTER 3 INSTALLATION
3.1
Connection
(1) Connection with IE-78K4-NS main unit See the IE-78K4-NS User's Manual (U13356E) for a description of how to connect the IE-784225-NS-EM1 to the IE-78K4-NS. (2) Connection with emulation probe See the IE-78K4-NS User's Manual (U13356E) for a description of how to connect an emulation probe to the IE784225-NS-EM1. On this board, the probe connector differs depending on the emulation probe used. * When using NP-100GC or NP-100GF, connect it to CN1. * When using NP-80GC or NP-80GK, connect it to CN2. Caution Incorrect connection may damage the IE system. Be sure to read the emulation probe's user's manual for a detailed description of the connection method. Figure 3-1. Connection of Emulation Probe
Emulation board (G-78K4 EM board)
Main board (G-78K4 MAIN board)
;; ;; ;;
User's Manual U13742EJ2V0UM
Emulation probe (sold separately)
CN1 100GC/GF CN2 80GC/GK
I/O emulation board (IE-784225-NS-EM1)
19
CHAPTER 3 INSTALLATION
3.2
Target Device Setting
SW1 in the IE-784225-NS-EM1 must be set in accordance with the target device (the PD784216A, 784216AY, 784218A, 784218AY, or 784225 Subseries) as follows.
PD784216A, 784218A Subseries: PD784225 Subseries:
Set SW1 to the 3, 6 pin side Set SW1 to the 1, 4 pin side
3.3
Selection of Emulator Main Unit
SW2 in the IE-784225-NS-EM1 must be set in accordance with the emulator main unit to be used as follows. Using IE-784225-NS-EM1 in combination with IE-78K4-NS: Set SW2 to the 3, 6 pin side (shipment setting) Using IE-784000-R in combination with IE-784225-NS-EM1 and IE-78K4-R-EX2: Set SW2 to the 1, 4 pin side
3.4
Clock Settings
3.4.1 Overview of clock settings The main system and subsystem clocks to be used during debugging can be selected from (1) to (3) below. (1) Clock that is already mounted on emulation board (2) Clock that is mounted by user (3) External clock If the target system includes an internal clock, select either "(1) Clock that is already mounted on emulation board" or "(2) Clock that is mounted by user". For an internal clock, the target device is connected to a resonator and the target device's internal oscillator is used. An example of the external circuit is shown in part (a) of Figure 3-2. During emulation, the resonator that is mounted on the target system is not used. Instead, it uses the clock that is mounted on the emulation board, which is installed for the IE-78K4-NS. If the target system includes an external clock, select "(3) External clock". For an external clock, a clock signal is supplied from outside of the target device and the target device's internal oscillator is not used. An example of the external circuit is shown in part (b) of Figure 3-2. Figure 3-2. External Circuits Used as System Clock Oscillator (a) Internal clock
Target device X1 or XT1 External clock
(b) External clock
Target device X1 or XT1
X2 or XT2
X2 or XT2
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User's Manual U13742EJ2V0UM
CHAPTER 3 INSTALLATION
(1) Clock that is already mounted on emulation board A crystal oscillator is already mounted on the emulation board. Its frequency is 25 MHz. Figure 3-3. When Using Clock That Is Already Mounted on Emulation Board
IE-78K4-NS IE-784225-NS-EM1
Target system
Mounted oscillator (to be used)
Emulation probe Resonator (not used)
Remark The clock that is supplied by the IE-784225-NS-EM1's oscillator (encircled in the figure) is used. (2) Clock that is mounted by user The user is able to mount any clock supported by the set specifications on the IE-784225-NS-EM1. First mount the resonator on the parts board, then attach the parts board to the IE-784225-NS-EM1. This method is useful when using a different frequency from that of the pre-mounted clock. Figure 3-4. When Using User-Mounted Clock
IE-78K4-NS IE-784225-NS-EM1
Parts board
Resonator (to be used) Emulation probe
Target system
Resonator (not used)
Remark The clock that is supplied by the IE-784225-NS-EM1's resonator (encircled in the figure) is used.
User's Manual U13742EJ2V0UM
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CHAPTER 3 INSTALLATION
(3) External clock An external clock connected to the target system can be used via an emulation probe. Figure 3-5. When Using an External Clock
IE-78K4-NS IE-784225-NS-EM1
Target system
Emulation probe Clock generator (to be used)
Remark The clock supplied by the target system's clock generator (encircled in the figure) is used. 3.4.2 Main system clock settings Table 3-1. Main System Clock Settings
Frequency of Main System Clock IE-784225-NS-EM1 Parts Board (UMCLK) When using clock that is already mounted on emulation board When using clock mounted by user When using external clock 25 MHz Oscillator used CPU Clock Source Selection (ID) Internal
Other than 25 MHz
Oscillator assembled by user
Oscillator not used
External
Caution
When using an external clock, open the configuration dialog box when starting the integrated debugger (ID78K4-NS) and select "External" in the area (Clock) for selecting the CPU's clock source (this selects the user's clock).
Remark The IE-784225-NS-EM1's factory settings are those listed above under "when using clock that is already mounted on emulation board". (1) When using clock that is already mounted on emulation board When the IE-784225-NS-EM1 is shipped, a 25 MHz crystal oscillator is already mounted in the IE-784225-NSEM1's UMCLK socket. When using the factory-set mode settings, there is no need to make any other hardware settings. When starting the integrated debugger (ID78K4-NS), open the configuration dialog box and select "Internal" in the area (Clock) for selecting the CPU's clock source (this selects the emulator's internal clock).
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User's Manual U13742EJ2V0UM
CHAPTER 3 INSTALLATION
(2) When using clock mounted by user The settings described under either (a) or (b) are required, depending on the type of clock to be used. When starting the integrated debugger (ID78K4-NS), open the configuration dialog box and select "Internal" in the area (Clock) for selecting the CPU's clock source (this selects the emulator's internal clock). (a) When using a ceramic resonator or crystal resonator
*
Items to be prepared * Parts board * Ceramic resonator or crystal resonator * Resistor Rx * Capacitor CA * Capacitor CB * Solder kit
<1> Solder the target ceramic resonator or crystal resonator, resistor Rx, capacitor CA, and capacitor CB (all with a suitable oscillation frequency) onto the parts board (as shown below). Figure 3-6. Connections on Parts Board (When Using Main System Clock or User-Mounted Clock) Parts board (UMCLK)
1 2 3 4 5 6 7 14 13 12 11 10 9 8
Pin No. 2-13 3-12 4-11 5-10 8-9 Capacitor CB Capacitor CA
Connection
Ceramic resonator or crystal resonator Resistor Rx Short
Circuit diagram
1 M HCU04 HCU04 5 Rx 10 4 3 CA 12 11 13 CB 2 98 CLOCK OUT
Remark The sections enclosed in broken lines indicate parts that are attached to the parts board.
User's Manual U13742EJ2V0UM
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CHAPTER 3 INSTALLATION
<2> Prepare the IE-784225-NS-EM1. <3> Remove the crystal oscillator that is mounted in the IE-784225-NS-EM1's socket (the socket marked as UMCLK). <4> Connect the parts board (from <1> above) to the socket (UMCLK) from which the crystal oscillator was removed (see <3> above). Check the pin 1 mark to make sure the board is mounted in the correct direction. <5> Make sure that the parts board mounted in the UMCLK socket on the emulation board is wired as shown in Figure 3-6 above. <6> Install the IE-784225-NS-EM1 in the IE-78K4-NS. The above steps configure the following circuit and enable supply of the clock from the mounted resonator to the emulation device.
IE-78K4-NS side (Emulation device)
1 M 6 HCU04 HCU04 5 Rx X 4 3 CA 12 11 4.7 k 13 CB 2 X1 VHC244 HD151015 10 LVCC A B Y Multiplier 9 8 4.7 k VHC244 CLK IN VCC
ALS157
Remark The sections enclosed in broken lines indicate parts that are attached to the parts board.
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User's Manual U13742EJ2V0UM
CHAPTER 3 INSTALLATION
(b) When using a crystal oscillator
*
Items to be prepared * Crystal oscillator (see pinouts shown in Figure 3-7) Figure 3-7. Crystal Oscillator (When Using Main System Clock or User-Mounted Clock)
NC VCC
GND
CLOCK OUT
<1> Prepare the IE-784225-NS-EM1. <2> Remove the crystal oscillator that is mounted in the IE-784225-NS-EM1's socket (the socket marked as UMCLK). <3> Connect the crystal oscillator (from <2> above) to the socket (UMCLK) from which the crystal oscillator was removed. Insert the crystal oscillator pin into the socket aligning the pins as shown in the figure below. Figure 3-8. Pin Alignment of Crystal Oscillator and Socket
Crystal oscillator NC VCC 1 2 3 4 5 6 GND CLOCK OUT 7
Socket 14 13 12 11 10 9 8
Crystal Oscillator Pin Name NC GND CLOCK OUT VCC
Socket Pin No. 1 7 8 14
<4> Install the IE-784225-NS-EM1 in the IE-78K4-NS.
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CHAPTER 3 INSTALLATION
The above steps configure the following circuit and enable supply of the clock from the mounted resonator to the emulation device.
IE-78K4-NS side (Emulation device)
VCC 4.7 k VHC244 Crystal oscillator Multiplier CLK IN VCC
A B LVCC 4.7 k X1
Y
ALS157
VHC244 HD151015
(3) When using external clock No hardware settings are required for this situation. When starting the integrated debugger (ID78K4-NS), open the configuration dialog box and select "External" in the area (Clock) for selecting the CPU's clock source (this selects the user's clock).
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User's Manual U13742EJ2V0UM
CHAPTER 3 INSTALLATION
3.4.3 Subsystem clock settings Table 3-2. Subsystem Clock Settings
Frequency of Subsystem Clock IE-784225-NS-EM1 Parts Board (USCLK) When using clock that is already mounted on emulation board When using clock mounted by user When using external clock 32.768 kHz 6 and 8 shorted JP1 Short 1 and 2
Other than 32.768 kHz
Oscillator assembled by user
Not used
Short 2 and 3
Caution
Jumper JP1, which is used to select the board's clock or an external clock, should be set only after turning off the IE-78K4-NS's power.
Remark The IE-784225-NS-EM1's factory settings are those listed above under "when using clock that is already mounted on emulation board". (1) When using clock that is already mounted on emulation board When the IE-784225-NS-EM1 is shipped, a 32.768 kHz crystal resonator is already mounted on the IE-784225NS-EM1. Pins 6 and 8 on the parts board (USCLK) are shorted. Short pins 1 and 2 on the IE-784225-NS-EM1's jumper (JP1). There is no need to make any other settings via the integrated debugger (ID78K4-NS). (2) When using clock mounted by user The settings described under either (a) or (b) are required, depending on the type of clock to be used. Short pins 1 and 2 on the IE-784225-NS-EM1's jumper (JP1). There is no need to make any other settings via the integrated debugger (ID78K4-NS). (a) When using a ceramic resonator or crystal resonator
*
Items to be prepared * Parts board * Ceramic resonator or crystal resonator * Resistor Rx * Capacitor CA * Capacitor CB * Solder kit
<1> Solder the target ceramic resonator or crystal resonator, resistor Rx, capacitor CA, and capacitor CB (all with a suitable oscillation frequency) onto the supplied parts board (as shown below).
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CHAPTER 3 INSTALLATION
Figure 3-9. Connections on Parts Board (When Using Subsystem Clock or User-Mounted Clock) Parts board (USCLK)
Pin No. 2-13 3-12 4-11 5-10 8-9 Capacitor CB Capacitor CA Ceramic resonator or crystal resonator Resistor Rx Short Connection
1 2 3 4 5 6 7
14 13 12 11 10 9 8
Circuit diagram
10 M HCU04 HCU04 5 Rx 10 4 3 CA 12 11 13 CB 2 98 CLOCK OUT
Remark The sections enclosed in broken lines indicate parts that are attached to the parts board.
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CHAPTER 3 INSTALLATION
<2> Prepare the IE-784225-NS-EM1. <3> Remove the parts board that is mounted in the IE-784225-NS-EM1's socket (the socket marked as USCLK). <4> Connect the parts board (from <1> above) to the socket (USCLK) from which the parts board was removed (see <3> above). Check the pin 1 mark to make sure the board is mounted in the correct direction. <5> Install the IE-784225-NS-EM1 in the IE-78K4-NS. The above steps configure the following circuit and enable supply of the clock from the mounted resonator to the emulation device.
10 M 1 HCU04 HCU04 98 5 Rx 10 4 3 CA 12 11 13 CB 2 Target system 3 JP1 CLK IN
IE-78K4-NS side (Emulation device)
Remark The sections enclosed in broken lines indicate parts that are attached to the parts board.
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29
CHAPTER 3 INSTALLATION
(b) When using a crystal oscillator
*
Items to be prepared * Crystal oscillator (see pinouts shown in Figure 3-10) Figure 3-10. Crystal Oscillator (When Using Subsystem Clock or User-Mounted Clock)
NC
VCC
GND
CLOCK OUT
<1> Prepare the IE-784225-NS-EM1. <2> Remove the parts board that is mounted in the IE-784225-NS-EM1's socket (the socket marked as USCLK). <3> Connect the crystal oscillator (from <2> above) to the socket (USCLK) from which the parts board was removed. Insert the crystal oscillator pin into the socket aligning the pins as shown below.
Crystal oscillator NC VCC 1 2 3 4 5 6 GND CLOCK OUT 7
Socket 14 13 12 11 10 9 8
Crystal Oscillator Pin Name NC GND CLOCK OUT VCC
Socket Pin No. 1 7 8 14
<4> Install the IE-784225-NS-EM1 in the IE-78K4-NS.
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CHAPTER 3 INSTALLATION
The above steps configure the following circuit and enable supply of the clock from the mounted oscillator to the emulation device.
IE-78K4-NS side (Emulation device)
+5 V 14 Parts board 1 Crystal oscillator 8 Target system 7 3 JP1 USCLK CLK IN TARGET
(3) When using external clock Short pins 2 and 3 on the IE-784225-NS-EM1's jumper (JP1). There is no need to make any other settings via the integrated debugger (ID78K4-NS).
3.4.4 Slew-rate clock emulation It is not possible to set the slew-rate clock using the ENMP bit of the CC register after the IE-784225-NS-EM1 has been activated. To use the slew-rate clock mode, switch 4 of the DIP switch (SW3) must be set as shown in Table 33 before power application. Table 3-3. DIP Switch Setting When Using Slew-Rate Clock Mode
Value of ENMP Bit DIP Switch Setting 4 0 (initial setting) 1 (slew-rate clock) ON OFF
Caution
The IE system may become hung up if a clock that exceeds 12.5 MHz is used when the slew-rate clock mode has been selected. Be sure not to supply a clock exceeding 12.5 MHz to the UMCLK socket when DIP switch (SW3) 4 is OFF, as this will cause the internal clock to be selected when the IE system is activated.
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CHAPTER 3 INSTALLATION
3.5
Pin Mask Function Settings
3.5.1 Wait (WAIT) mask function By setting switches 1 and 2 of DIP switch (SW3) in the IE-784225-NS-EM1, it is possible to mask the alternate function (WAIT) of pin P66 in the PD784216A, 784218A, and 784225 Subseries. Table 3-4. DIP Switch Setting for Wait (WAIT) Mask Function
Status DIP Switch Setting 1 (WAITMSK) No mask (initial setting) Wait masked OFF ON 2 (P66ON) ON OFF
Caution
Do not set the DIP switch to settings other than those above.
3.5.2 Wait display function setting By setting switch 3 of the DIP switch (SW3) in the IE-784225-NS-EM1, it is possible to display the status of "waiting" with an LED light. Table 3-5. DIP Switch Setting for Wait Display Function
Status DIP Switch Setting 3 (WAITLED) Wait (WAIT) status not displayed (initial setting) Wait (WAIT) status displayed OFF ON
Caution
When pin P66 is used as a port pin, unless the DIP switch is turned OFF the LED may light up.
3.5.3 NMI interrupt mask setting By setting switch 5 of the DIP switch (SW3) in the IE-784225-NS-EM1, it is possible to mask the NMI interrupt, which is the alternate function of the P02/INTP2 pin. Table 3-6. DIP Switch Setting for NMI Interrupt Mask
Status DIP Switch Setting 5 No NMI mask (initial setting) NMI masked ON OFF
Caution
Because the NMI interrupt is the alternate function of the P02/INTP2 pin, this pin cannot operate as the P02/INTP2 pin when the NMI mask status has been set.
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CHAPTER 3 INSTALLATION
3.6
Low-Voltage Emulation Setting
Low-voltage emulation is possible in the IE system. When the target system is operating on low voltage, supply the same voltage as the target system to the TP1 terminal pin of the IE-784225-NS-EM1. Set the target voltage between 3 and 5 V. * Maximum current consumption of TP1 5V
. . .
300 mA
. . .
3V
150 mA
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CHAPTER 3 INSTALLATION
3.7
External Trigger
To set up an external trigger, connect it to the IE-784225-NS-EM1's check pin, EXTOUT pin, and EXTIN pin as shown below. See the integrated debugger (ID78K4-NS) User's Manual (U12796E) for descriptions of related use methods and pin characteristics. Figure 3-11. External Trigger Input Position
SW3 DIP switch
SW1
OFF
CN2 CN1 TP1 EXTOUT (TP3) EXTIN (TP4)
SW2
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
This chapter describes differences between the target device's signal lines and the signal lines of the IE-784225NS-EM1's target interface circuit. Although the target device is a CMOS circuit, the IE-784225-NS-EM1's target interface circuit consists of an emulation CPU, TTL, CMOS-IC, and other emulation circuits. When the IE system is connected with the target system for debugging, the IE system performs emulation so as to operate as the actual target device would operate in the target system. However, some minor differences exist since the operations are performed via the IE system's emulation. (1) Signals directly input/output to/from the emulation CPU (2) Signals input from the target system via a gate (3) Other signals The IE system's circuit is used as follows for signals listed in (1) to (3) above. (1) Signals directly input/output to/from the emulation CPU The following signals perform the same operations as in the PD784216A, 784216AY, 784218A, 784218AY, and 784225 Subseries. For the signals related to ports excluding ports 1 and 13 (having alternate functions as pins for A/D and D/A converters), however, a 1 M pull-down resistor and 22 resistor are inserted in series. * Signals related to port 0 * Signals related to port 1 (A/D converter input) * Signals related to port 2 * Signals related to port 3 * Signals related to port 7 * Signals related to port 10 * Signals related to port 12 * Signals related to port 13 (D/A converter input) * Signals related to A/D converter * AVREF0 * AVREF1 * AVSS * AVDD
Note
Note The AVDD pin on the target system is not connected to the IE system. Either the power supply of the IE system or the power supply supplied to TP1 is supplied to the AVDD pin of the emulation CPU. Port 10 and AVREF0 are not used when the target system is the PD784225 Subseries.
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
Figure 4-1. Equivalent Circuit 1 of Emulation Circuit
Probe side
P00, P01, P03 to P06 22 1 M ALTERA EPM7128-15 HD151015 PM02 P02 22 1 M
IE-78K4-NS side
P20 to P27
22 1 M
ALTERA EPM7128-15 P37 22 HD151015 1 M EXA/P37 switch HD151015
P30 to P36
22 1 M
P40 to P47
22 1 M
P50 to P57
22 1 M
P67
22 HC4066 1 M
P66
22 DIP SW3 1 M
P60 to P65
22 1 M
Remark When the target device is the PD784225 Subseries, the signal of the P06 pin is not used in the IE system.
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
Figure 4-2. Equivalent Circuit 2 of Emulation Circuit
Probe side
P70 to P72 22 1 M P80 to P87 22 HC4066 1 M
IE-78K4-NS side
AC573 HC4049 AC04
AD0 to AD7
P90 to P97
22 1 M
VHC125
LS26
AC04 HD151015
P100 to P103
22 1 M
P119
P120 to P127
22 1 M
P10/ANI0 to P17/ANI7
P130/ANO0, P131/ANO1
AVREF0
AVREF1 LVCC Open AVSS
AVDD
Remark When the target device is the PD784225 Subseries, the following signals are not used in the IE system, and LVCC is supplied to AVREF0. P80 to P87, P90 to P97, and P100 to P103
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
(2) Signals input from the target system via a gate Since the following signals are input via a gate, their timing shows a delay compared to that of the PD784225 Subseries. Their AC characteristics and DC characteristics are therefore different from PD784225 Subseries, making it necessary to observe a stricter timing design than in the case of PD784216A, 784216AY, 784218A, 784218AY, and 784225 Subseries. * RESET signal * Signals related to clock input Figure 4-3. Equivalent Circuit 3 of Emulation Circuit
LVCC 4.7 k RESET 24 HD151015 ALTERA EPM7128-15 VHC244 RESET
IE-784225-NS-EM1 X1 mounted clock LVCC 4.7 k X1 VHC244 HD151015
ALS157 4.7 k Multiplier
VCC VHC244 CLK IN
JP1
ALS157 (multiplier selection) Input RZT025P ACT86 Output
Multiplier
X2
Open
Remark The multiplier can be selected by switch 4 of the DIP switch (SW3). When the multiplier is not selected, the IE system is supplied with the input frequency unchanged. When the multiplier is selected, the IE system is supplied with a frequency 2 times that input. Be sure to observe the caution concerning emulation of the slew-rate clock in 3.4.4.
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CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
Figure 4-4. Equivalent Circuit 4 of Emulation Circuit
Probe side VCC 4.7 k XT1 10 M VCC HCU04 6 4.7 k 8 3 1 VHC244 2 XT1 IE-78K4-NS side
HCU04
IC socket 470 k 32.768 kHz JP1
22 pF
22 pF
XT2
(Open)
HC4053 TEST/VPP 1 M TEST/VPP
The internal IE system voltage is selected for the TEST/VPP input to the IE system during reset. The voltage from the target is selected after reset is released. (3) Other signals * VDD pin When the emulation CPU is operating at 5 V, its power is supplied from the internal IE system, but when operating at low voltage, its power is supplied from the low-voltage pin (TP1). The VDD pin of the target system is only used to control the LED (USERVDD) in the IE system that monitors the input of the target system's power supply. * VSS pin The VSS pin is connected to GND inside the IE system.
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APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-1. NP-80GC/GK Pin Assignments (1/2)
Emulation Probe 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 CN2 Pin No. 114 113 108 107 104 103 100 99 94 93 30 29 24 23 20 19 16 15 10 9 37 43 44 47 48 51 52 57 58 59 60 55 56 Emulation Probe 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 CN2 Pin No. 49 50 45 46 41 42 35 8 7 14 13 18 17 22 21 28 27 92 91 98 97 102 101 106 105 112 111 83 77 78 73 74 69
Remarks 1. The NP-80GC/GK are products of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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User's Manual U13742EJ2V0UM
APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-1. NP-80GC/GK Pin Assignments (2/2)
Emulation Probe 67 68 69 70 71 72 73 CN2 Pin No. 70 63 64 61 62 65 66 Emulation Probe 74 75 76 77 78 79 80 CN2 Pin No. 71 72 75 76 79 80 85
Remarks 1. The NP-80GC/GK are products of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-2. NP-100GC Pin Assignments (1/2)
Emulation Probe 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 CN1 Pin No. 118 117 114 113 108 107 104 103 100 99 94 93 30 29 24 23 20 19 16 15 10 9 6 5 33 34 37 38 43 44 47 48 51 Emulation Probe 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 CN1 Pin No. 52 57 58 59 60 55 56 49 50 45 46 41 42 35 36 31 32 4 3 8 7 14 3 18 17 22 21 28 27 92 91 98 97
Remarks 1. The NP-100GC is a product of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-2. NP-100GC Pin Assignments (2/2)
Emulation Probe 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 CN1 Pin No. 102 101 106 105 112 111 116 115 87 88 83 84 77 78 73 74 69 Emulation Probe 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 CN1 Pin No. 70 63 64 61 62 65 66 71 72 75 76 79 80 85 86 89 90
Remarks 1. The NP-100GC is a product of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-3. NP-100GF Pin Assignments (1/2)
Emulation Probe 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 CN1 Pin No. 116 115 87 88 83 84 77 78 73 74 69 70 63 64 61 62 65 66 71 72 75 76 79 80 85 86 89 90 118 117 114 113 108 Emulation Probe 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 CN1 Pin No. 107 104 103 100 99 94 93 30 29 24 23 20 19 16 15 10 9 6 5 33 34 37 38 43 44 47 48 51 52 57 58 59 60
Remarks 1. The NP-100GF is a product of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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APPENDIX A EMULATION PROBE PIN ASSIGNMENT TABLE
Table A-3. NP-100GF Pin Assignments (2/2)
Emulation Probe 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 CN1 Pin No. 55 56 49 50 45 46 41 42 35 36 31 32 4 3 8 7 14 Emulation Probe 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 CN1 Pin No. 13 18 17 22 21 28 27 92 91 98 97 102 101 106 105 112 111
Remarks 1. The NP-100GF is a product of Naito Densei Machida Mfg. Co., Ltd. 2. The numbers in the "Emulation probe" column indicate the corresponding pin number on the emulation probe tip.
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45
APPENDIX B PROGRAM WAIT CONTROL REGISTER SETTINGS IN IN-CIRCUIT EMULATOR
When performing programmable debugging using the in-circuit emulator, wait control must be performed by setting PWC1 and programmable wait control register 2 (PWC2). If an external wait is set for the internal ROM area, the CPU becomes deadlocked. The deadlock status is cleared only by reset input. The settings of PWC2 and PWC1, other than bits 1 and 0, are invalid in the actual device, but have no adverse effect.
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APPENDIX B PROGRAM WAIT CONTROL REGISTER SETTINGS IN IN-CIRCUIT EMULATOR
(1) Program wait control register 1 (PWC1) of in-circuit emulator
Address: 0FFC7H Symbol PWC1 (n = 0 to 3) Wait Target Address PWn1 PWn0 0 0 1 1 0 1 0 1 00C000H to 00FFFFH No address wait insertion 1-wait access wait insertion 2-wait access wait insertion Access wait insertion for low-level time input to WAIT pin 008000H to 00BFFFH 004000H to 007FFFH 000000H to 003FFFH 7 PW31 After reset: AAH 6 PW30 5 PW21 R/W 4 PW20 3 PW11 2 PW10 1 PW01 0 PW00
(2) Program wait control register 2 (PWC2) of in-circuit emulator
Address: 0FFC8H Symbol PWC2 15 1 7 PW71 (n = 4 to 7) Wait Target Address PWn1 PWn0 0 0 1 1 0 1 0 1 080000H to 0FFFFFH No address wait insertion 1-wait access wait insertion 2-wait access wait insertion Access wait insertion for low-level time input to WAIT pin 040000H to 07FFFFH 020000H to 03FFFFH 010000H to 01FFFFH After reset: AAAAH 14 0 6 PW70 13 1 5 PW61 W 12 0 4 PW60 11 1 3 PW51 10 0 2 PW50 9 1 1 PW41 8 0 0 PW40
Remark
Wait cycle insertion is controlled by the entire address space (except peripheral RAM area).
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APPENDIX C REVISION HISTORY
The history of revisions up to this edition is shown below. The "Applied to:" column indicates the chapters in each edition to which the revision was applied.
Edition 2nd edition Major Revisions from Previous Edition Change of debugger supply medium to CD-ROM, addition of (-A) to IE-70000-PCI-IF, addition of website address for downloading device files, and modification of telephone number of Naito Densei Machida Mfg. Co., Ltd. Modification of target devices in basic specifications Addition of description for selection of emulator main unit Deletion of description that parts board is supplied Modification of chapter title and description APPENDIX B PROGRAM WAIT CONTROL REGISTER SETTINGS IN IN-CIRCUIT EMULATOR CHAPTER 3 INSTALLATION Applied to: CHAPTER 1 GENERAL
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[MEMO]
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